BCA-04 Introduction
to Computer Organization
PART A
Answer all
Questions:-
1. Convert the
Following Binary numbers to decimal
(i)
10101010
The number 10101010 represents:
128 + 32 + 8 + 2
So, the answer is: 170
128 + 32 + 8 + 2
So, the answer is: 170
(ii)
Convert the Following decimal numbers to binary
49.25
The number 49.25 can be expressed as:
32 + 16 + 1
So, the answer is: 110001
32 + 16 + 1
So, the answer is: 110001
2. Write Short note on
Star Network. (150 words)
Answer:
Star networks
are one of the most common computer network topologies. In its simplest form, a
star network consists of one central switch, hub or computer, which acts as a
conduit to transmit messages. This consists of a central node, to which all
other nodes are connected; this central node provides a common connection point
for all nodes through a hub. In Star topology every node (computer workstation
or any other peripheral) is connected to central node called hub or switch. The
switch is the server and the peripherals are the clients. Thus, the
hub and leaf nodes, and the transmission lines between them, form a graph with
the topology of a star. If the central node is passive, the originating
node must be able to tolerate the reception of an echo of its own transmission,
delayed by the two-way transmission time (i.e. to and from the central node)
plus any delay generated in the central node. An active star network has
an active central node that usually has the means to prevent echo-related
problems.
3. What is Micro
Programmed Control Unit.
Answer:
Microprogrammed
Control Unit:
A control unit
whose binary control variables are stored in memory (control memory).
The Microprograms
were organized as a sequence of microinstructions and stored in special
control memory. The algorithm for the microprogram control unit is usually
specified by flowchart description. The main advantage of the microprogram control
unit is the simplicity of its structure. Outputs of the controller are
organized in microinstructions and they can be easily replaced.
The control unit is the circuitry that controls the flow of
data through the processor, and coordinates the activities of the other units
within it. In a way, it is the "brain within the brain", as it
controls what happens inside the processor, which in turn controls the rest of
the computer. The examples of devices that require a control unit are CPUs and
graphics processing units (GPUs). The modern information age would not be
possible without complex control unit designs. The control unit receives
external instructions or commands which it converts into a sequence of control
signals that the control unit applies to the data path to implement a sequence
of register-transfer level operations.
The control unit implements the instruction
set of the CPU. It performs the tasks of fetching, decoding, managing execution
and then storing results. It may manage the translation of instructions (not
data) to micro-instructions and manage scheduling the micro-instructions
between the various execution units. On some processors the control unit may be
further broken down into other units, such as a scheduling unit to handle
scheduling and a retirement unit to deal with results coming from the pipeline;
It is the main function of CPU.
PART
B Long answer
ANSWER THE Following:
1. I) write short notes on Registers.
In computer architecture, a processor register is a small amount of storage
available as part of a CPU or other digital processor. Such registers are
(typically) addressed by mechanisms other than main memory and can be accessed
more quickly. Almost all computers, load-store architecture or not, load data
from a larger memory into registers where it is used for arithmetic,
manipulated, or tested, by some machine instruction. Manipulated data is then
often stored back in main memory, either by the same instruction or a
subsequent one. Modern processors use either static or dynamic RAM as main
memory, the latter often being implicitly accessed via one or more cache levels.
A common property of computer programs is locality of reference: the same
values are often accessed repeatedly and frequently used values held in
registers improves performance. This is what makes fast registers (and caches)
meaningful.Processor registers are normally at the top of the memory hierarchy, and provide the fastest way to access data. The term normally refers only to the group of registers that are directly encoded as part of an instruction, as defined by the instruction set. However, modern high performance CPUs often have duplicates of these "architectural registers" in order to improve performance via register renaming, allowing parallel and speculative execution. Modern x86 is perhaps the most well known example of this technique.
Allocating frequently used variables to registers can be critical to a
program's performance. This register allocation is either performed by a compiler,
in the code generation phase, or manually, by an assembly language programmer.
ii) Explain Master – Slave Flip-Flop
Master-Slave Flip-Flops :
A
master-slave flip-flop is normally constructed from two flip-flops: one is the
Master flip-flop and the other is the Slave. In addition to these two
flip-flops, the circuit also includes an inverter. The inverter is connected to
clock pulse in such a way that the inverted CP is given to the slave flip-flop.
For example, if the CP=0 for a master flip-flop, then the output of the inverter
is 1, and this value is assigned to the slave flip-flop. In other words if CP=0
for a master flip-flop, then CP=1 for a slave flip-flop.
A
master-slave flip flop can be constructed using any type of flip-flop which
forms a combination with a clocked RS flip-flop, and with an inverter as slave
circuit.
The output of the master J-K flip flop is fed to the input of the slave J-K
flip flop. The output of the slave J-K flip flop is given as a feedback to the
input of the master J-K flip flop. The clock pulse [Clk] is given to the master
J-K flip flop and it is sent through a NOT Gate and thus inverted before
passing it to the slave J-K flip flop.
When CP=1, the master flip-flop is enabled and the slave flip-flop remains isolated from the circuit until CP goes back to 0. Now Y and Y’ depends on the external inputs R and S of the master flip-flop.
Assume that the flip-flop is in a clear state and no clock pulse is applied to the circuit. The external inputs given are S=1 and R=0. This input will not affect the state of the system until the CP=1. Now the next clock pulse applied should change the state to SET state (S=1, R=0). During the clock pulse transition from 0 to 1, the master flip-flop goes to set state and changes the output Y to 1. However this does not affect the output of the system since the slave flip-flop is isolated from the system (CP=0 for slave). So no change is observed at the output of the system.
When the CP returns to 0, the master flip-flop is disabled while the slave is enabled. So the information from the master is allowed to pass through to the slave. Since Y=1, this changes the output Q to 1.
In a master slave flip-flop it is possible to change the output of the flip-flop and the external input with same clock pulse. This is because the external input S can be changed at the same time while the pulse goes through its negative edge transition. When CP=0, change in external input S would not affect the state of the system. From this behavior of the master slave flip-flop it is quite clear that the state change in flip-flops coincide with the negative edge transition of the pulse.
Negative edge transition means an
inverter is attached between the CP terminal and the input of the slave. In
positive edge triggered master slave flip-flops an additional inverter is
attached between the CP terminal and the input of the master. Such flip-flops
are triggered with negative pulses. Negative edge of the pulse affects the
master and positive edge affects the slave.
Great job vignesh...
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